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exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 1 sp3238e intelligent +3.0v to +5.5v rs-232 transceiver the sp3238e device is an rs-232 transceiver solution intended for portable or hand-held applications such as notebook and palmtop computers. the sp3238e uses an internal high-effciency, charge-pump power supply that requires only 0.1f capacitors in 3.3v operation. this charge pump and exar's driver architecture allow the sp3238e device to deliver compliant rs-232 performance from a single power supply ranging from +3.0v to +5.5v. the sp3238e is a 5-driver / 3-receiver device that is ideal for laptop / notebook computer and pda applications. the sp3238e includes one complementary receiver that remains alert to monitor an external device's ring indicate signal while the device is shutdown. the auto on-line ? feature allows the device to automatically "wake-up" during a shutdown state when an rs-232 cable is connected and a connected peripheral is turned on. otherwise, the device automatically shuts itself down drawing less than 1a. features meets true eia/tia-232-f standards from a +3.0v to +5.5v power supply interoperable with eia/tia-232 and adheres to eia/tia-562 down to a +2.7v power source auto on-line ? circuitry automatically wakes up from a 1a shutdown minimum 250kbps data rate under load regulated charge pump yields stable rs-232 outputs regardless of v cc variations enhanced esd specifcations: + 15kv human body model + 15kv iec61000-4-2 air discharge + 8kv iec61000-4-2 contact discharge description selection table now available in lead free packaging t 4 in 1 2 3 4 25 26 27 28 5 6 7 24 23 22 shutdown c2- v- r 1 in r 2 in in online c2+ c1- gnd v cc v+ t 1 in 8 9 10 11 18 19 20 21 12 13 14 17 16 15 t out t 2 out t 3 out t 3 in t 2 in t 5 in r 3 out r 2 out r 1 out r 1 out sp3238e c1+ t 4 out t 5 out status 1 3 r device power supplies rs-232 drivers rs-232 receivers external components auto on-line circuitry ttl 3-state # of pins sp3220e +3.0v to +5.5v 1 1 4 capacitors no yes 16 SP3223E +3.0v to +5.5v 2 2 4 capacitors yes yes 20 sp3243e +3.0v to +5.5v 3 5 4 capacitors yes yes 28 sp3238e +3.0v to +5.5v 5 3 4 capacitors yes yes 28
2 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 note 1: v+ and v- can have maximum magnitudes of 7v, but their absolute difference cannot exceed 13v. absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifcations below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. v cc .......................................................-0.3v to +6.0v v+ (note 1).......................................-0.3v to +7.0v v- (note 1)........................................+0.3v to -7.0v v+ + |v-| (note 1)...........................................+13v i cc (dc v cc or gnd current)......................... + 100ma input voltages txin, online, shutdown, ....-0.3v to vcc + 0.3v rxin................................................................... + 25v output voltages txout............................................................. + 13.2v rxout, status.......................-0.3v to (v cc +0.3v) short-circuit duration txout....................................................continuous storage temperature......................-65c to +150c v cc = +3.0v to +5.5v, c1 - c4 = 0.1 f ( tested at 3.3v +/-5%), c1 - c4 = 0.22 f (tested at 3.3v +/-10%), c1 = 0.047 f and c2 - c4 = 0.33 f (tested at 5.0v +/-10%), t amb = t min to t max , unless otherwise noted. typical values are at t a = 25 o c power dissipation per package 28-pin ssop (derate 11.2mw/ o c above +70 o c)..........900mw 28-pin tssop (derate 13.2mw/ o c above +70 o c)......1100mw electrical characteristics parameter min. typ. max. units conditions dc characteristics supply current, auto on- line? 1.0 10 a all rxin open, online = gnd, shutdown = v cc , txin = gnd or v cc supply current, shutdown 1.0 10 a shutdown = gnd, txin = vcc or gnd supply current auto on-line? disabled 0.3 1.0 ma online = shutdown = vcc, no load, txin = gnd or v cc logic inputs and receiver outputs input logic threshold low high 2.4 0.8 v v v cc = +3.3v or +5.0v, txin online, shutdown input leakage current + 0.01 + 1.0 a txin, online, shutdown, t amb = +25 o c output leakage current + 0.05 + 10 a receivers disabled output voltage low 0.4 v i out = 1.6ma output voltage high v cc -0.6 v cc -0.1 v i out = -1.0ma driver outputs output voltage swing + 5.0 + 5.4 v all driver outputs loaded with 3k? to gnd
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 3 electrical characteristics parameter min. typ. max. units conditions driver outputs (continued) output resistance 300 ? v cc = v+ = v- = 0v, v out = + 2v output short-circuit current + 35 + 60 ma v out = 0v receiver inputs input voltage range -25 25 v input threshold low 0.6 1.2 v vcc = 3.3v input threshold low 0.8 1.5 v vcc = 5.0v input threshold high 1.5 2.4 v vcc = 3.3v input threshold high 1.8 2.4 v vcc = 5.0v input hysteresis 0.5 v input resistance 3 5 7 k? auto on-line? circuitry characteristics (online = gnd, shutdown = vcc) status output voltage low 0.4 v i out = 1.6ma status output voltage high v cc -0.6 v i out = -1.0ma receiver threshold to drivers enabled (t online ) 200 s figure 10 receiver positive or negative threshold to status high (t stsh ) 0.5 s figure 10 receiver positive or negative threshold to status low (t stsl ) 20 s figure 10 timing characteristics maximum data rate 250 kbps r l = 3k?, c l = 1000pf, one driver switching receiver propagation delay t phl t plh 0.15 0.15 s receiver input to receiver out - put, c l = 150pf receiver output enable time 200 ns normal operation receiver output disable time 200 ns normal operation driver skew 100 ns | t phl - t plh |, t amb = 25 c receiver skew 50 ns | t phl - t plh | transition-region slew rate 30 v/s vcc = 3.3v, r l = 3k?, t amb = 25 c, measurements taken from -3.0v to +3.0v or +3.0v to -3.0v v cc = +3.0v to +5.5v, c1 - c4 = 0.1 f ( tested at 3.3v +/-5%), c1 - c4 = 0.22 f (tested at 3.3v +/-10%), c1 = 0.047 f and c2 - c4 = 0.33 f (tested at 5.0v +/-10%), t amb = t min to t max , unless otherwise noted. typical values are at t a = 25 o c
4 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 unless otherwise noted, the following performance characteristics apply for v cc = +3.3v, 250kbps data rate, all drivers loaded with 3k?, 0.1f charge pump capacitors, and t amb = +25 c. figure 2. slew rate vs. load capacitance figure 1. transmitter output voltage vs. load capacitance -6 -4 -2 0 2 4 6 0 1 000 2000 3000 4000 5000 p f v o lt v o h v o l figure 3. supply current vs. load capacitance when transmitting data typical performance characteristics 0 5 10 15 20 25 0 1 000 2000 3000 4000 5000 p f v / u s p o s . s r n e g s r 0 10 20 30 40 50 60 0 1 000 2000 3000 4000 5000 p f m a 250k bp s 120k bp s 20 k b ps
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 5 table 1. device pin description name function pin number c2+ positive terminal of the symmetrical charge-pump capacitor c2. 1 gnd ground. 2 c2- negative terminal of the symmetrical charge-pump capacitor c2. 3 v- regulated -5.5v output generated by the charge pump. 4 t 1 out rs-232 driver output. 5 t 2 out rs-232 driver output. 6 t 3 out rs-232 driver output. 7 r 1 in rs-232 receiver input. 8 r 2 in rs-232 receiver input. 9 t 4 out rs-232 driver output. 10 r 3 in rs-232 receiver input. 11 t 5 out rs-232 driver output. 12 online apply logic high to override auto on-line? circuitry keeping drivers active (shutdown must also be logic high, refer to table 2). 13 shutdown apply logic low to shut down drivers and charge pump. this overrides all auto on-line? circuitry and online (refer to table 2). 14 status ttl/cmos output indicating if a rs-232 signal is present on any receiver input. 15 r 1 out non-inverting receiver - 1 output, active in shutdown. 16 t 5 in ttl/cmos driver input. 17 r 3 out ttl/cmos receiver output. 18 t 4 in ttl/cmos driver input. 19 r 2 out ttl/cmos receiver output. 20 r 1 out ttl/cmos receiver output. 21 t 3 in ttl/cmos driver input. 22 t 2 in ttl/cmos driver input. 23 t 1 in ttl/cmos driver input. 24 c1- negative terminal of the symmetrical charge-pump capacitor c1. 25 vcc +3.0v to +5.5v supply voltage. 26 v+ regulated +5.5v output generated by the charge pump. 27 c1+ positive terminal of the symmetrical charge-pump capacitor c1. 28
6 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 figure 5. sp3238e typical operating circuit sp3238e 28 25 3 1 27 4 26 gnd c1+ c1- c2+ c2- v+ v- v cc 0.1f + c2 c5 c1 + + c3 c4 + + to p supervisor circuit 13 14 15 v cc v cc 2 online shutdo wn st a tus 5k? 16 21 20 18 8 9 11 rs-232 inputs ttl/cmos outputs r 1 out r 1 in r 1 out r 2 in r 3 in r 2 out r 3 out 24 23 22 5 6 7 rs-232 output s ttl/cmos inputs t 1 in t 2 out t 2 in t 3 in t 3 out t 1 out 19 17 10 12 t 4 out t 4 in t 5 in t 5 out 0.1f 0.1f 0.1f 0.1f 5k? 5k? figure 4. sp3238e pinout confguration t 4 in 1 2 3 4 25 26 27 28 5 6 7 24 23 22 shutdown c2- v- r 1 in r 2 in in online c2+ c1- gnd v cc v+ t 1 in 8 9 10 11 18 19 20 21 12 13 14 17 16 15 t out t 2 out t 3 out t 3 in t 2 in t 5 in r 3 out r 2 out r 1 out r 1 out sp3238e c1+ t 4 out t 5 out status 1 3 r
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 7 description the sp3238e device meets the eia/tia-232 and itu-t v.28/v.24 communication protocols and can be implemented in battery-powered, portable, or hand-held applications such as notebook or palmtop computers. the sp3238e devices feature exar's proprietary and patented (u.s.-- 5,306,954) on-board charge pump cir - cuitry that generates 5.5v rs-232 voltage levels from a single +3.0v to +5.5v power supply. the sp3238e devices can guarantee a data rate of 250kbps fully loaded. the sp3238e is a 5-driver/3-receiver device, ideal for portable or hand-held applications. the sp3238e includes one complementary always-active receiver that can monitor an external device (such as a modem) in shutdown. this aids in protecting the uart or serial controller ic by preventing forward biasing of the protection diodes where v cc may be disconnected. the sp3238e device is an ideal choice for power sensitive designs. the sp3238e device features auto on-line ? circuitry which reduces the power supply drain to a 1a supply current. in many portable or hand-held applications, an rs-232 cable can be disconnected or a connected peripheral can be turned off. under these condi - tions, the internal charge pump and the drivers will be shut down. otherwise, the system automati - cally comes online. this feature allows design engineers to address power saving concerns without major design changes. theory of operation the sp3238e device is made up of four basic circuit blocks: 1. drivers 2. receivers 3. the exar proprietary charge pump, and 4. auto on-line ? circuitry. drivers the drivers are inverting level transmitters that convert ttl or cmos logic levels to 5.0v eia/ tia-232 levels with an inverted sense relative to the input logic levels. typically, the rs-232 output voltage swing is + 5.4v with no load and + 5v minimum fully loaded. the driver outputs are protected against infnite short-circuits to ground without degradation in reliability. these drivers comply with the eia-tia-232-f and all previous rs-232 versions. the drivers can guarantee a data rate of 250kbps fully loaded with 3k? in parallel with 1000pf, ensuring compatibility with pc-to-pc communi - cation software. all unused drivers inputs should be connected to gnd or v cc . the slew rate of the driver output is internally limited to a maximum of 30v/s in order to meet the eia standards (eia rs-232d 2.1.7, paragraph 5). the transition of the loaded output from high to low also meets the monotonicity requirements of the standard. figure 7 shows a loopback test circuit used to test the rs-232 drivers. figure 8 shows the test results of the loopback circuit with all fve drivers active at 120kbps with typical rs-232 loads in parallel with 1000pf capacitors. figure 9 shows the test results where one driver was active at 250kbps and all fve drivers loaded with an rs-232 receiver in parallel with a 1000pf ca - pacitor. a solid rs-232 data transmission rate of 120kbps provides compatibility with many designs in personal computer peripherals and lan applications. figure 6. interface circuitry controlled by microprocessor supervisory circuit sp3238e 28 25 3 1 27 4 26 gn d c1+ c1- c2+ c2- v+ v- v cc 0.1f + c2 c5 c1 + + c3 c4 + + 13 14 15 v cc 2 online shutdo wn st a tus p supervisor ic v cc v in reset 5k? 5k? 5k? 24 23 22 16 21 20 18 5 6 7 8 9 11 rs-232 output s rs-232 inputs t 1 in r 1 ou t r 1 in t 2 ou t r 1 ou t t 2 in t 3 in t 3 ou t t 1 ou t r 2 in r 3 in r 2 ou t r 3 out uart or serial c txd rt s dtr rxd cts dsr dcd ri 19 17 10 12 t 4 ou t t 4 in t 5 in t 5 ou t 0.1f 0.1f 0.1f 0.1f
8 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 receivers the receivers convert + 5.0v eia/tia-232 levels to ttl or cmos logic output levels. re - ceivers are high-z when the auto on-line ? circuitry is enabled or when in shutdown. the sp3238e includes an additional non-in - verting receiver with an output r 1 out. r 1 out is an extra output that remains active and monitors activity while the other receiver outputs are forced into high impedance. this allows a ring indicator (ri) signal from a peripheral to be monitored without forward biasing the ttl/cmos inputs of the other devices connected to the receiver outputs. since receiver input is usually from a transmis - sion line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mv. this ensures that the receiver is virtually immune to noisy transmission lines. should an input be left unconnected, an internal 5k? pulldown resistor to ground will commit the output of the receiver to a high state. charge pump the charge pump is an exarCpatented design (u.s. 5,306,954) and uses a unique approach compared to older lessCefficient designs. the charge pump still requires four external figure 7. loopback test circuit for rs-232 driver data transmission rates capacitors, but uses a fourCphase voltage shifting technique to attain symmetrical 5.5v power supplies. the internal power supply consists of a regulated dual charge pump that provides output voltages 5.5v regardless of the input voltage (v cc ) over the +3.0v to +5.5v range. this is important to maintain compli - ant rs-232 levels regardless of power supply fuctuations. figure 9. loopback test results at 250kbps (all drivers fully loaded) figure 8. loopback test results at 120kbps (all drivers fully loaded) sp3238e txin txout c1+ c1- c2+ c2- v+ v- v cc 0.1f + c2 c5 c1 + + c3 c4 + + logic inputs v cc 5k ? rxin rxout logic outputs shutdown gnd v cc online 1000p f 0.1f 0.1f 0.1f 0.1f
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 9 the charge pump operates in a discontinuous mode using an internal oscillator. if the output voltages are less than a magnitude of 5.5v, the charge pump is enabled. if the output voltages exceed a magnitude of 5.5v, the charge pump is disabled. this oscillator controls the four phases of the voltage shifting. a description of each phase follows. phase 1 v ss charge storage during this phase of the clock cycle, the positive side of capacitors c 1 and c 2 are initially charged to v cc . c l + is then switched to gnd and the charge in c 1 C is transferred to c 2 C . since c 2 + is connected to v cc , the voltage potential across capacitor c 2 is now 2 times v cc . phase 2 v ss transfer phase two of the clock connects the negative terminal of c 2 to the v ss storage capacitor and the positive terminal of c 2 to gnd. this transfers a negative gener - ated voltage to c 3 . this generated voltage is regulated to a minimum voltage of -5.5v. simultaneous with the transfer of the voltage to c 3 , the positive side of capacitor c 1 is switched to v cc and the negative side is connected to gnd. phase 3 v dd charge storage the third phase of the clock is identical to the frst phase the charge transferred in c 1 produces Cv cc in the negative terminal of c 1 , which is applied to the negative side of capacitor c 2 . since c 2 + is at v cc , the volt - age potential across c 2 is 2 times v cc . phase 4 v dd transfer the fourth phase of the clock connects the negative terminal of c 2 to gnd, and transfers this positive generated voltage across c 2 to c 4 , the v dd storage capacitor. this voltage is regulated to +5.5v. at this voltage, the internal oscillator is disabled. simultane - ous with the transfer of the voltage to c 4 , the positive side of capacitor c 1 is switched to v cc and the negative side is connected to gnd, al - lowing the charge pump cycle to begin again. the charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. since both v + and v C are separately generated from v cc , in a noCload condition v + and v C will be symmetrical. older charge pump approaches that generate v C from v + will show a decrease in the magnitude of v C compared to v + due to the inherent ineffciencies in the design. the clock rate for the charge pump typically operates at 500khz. the external capacitors can be as low as 0.1f with a 16v breakdown voltage rating. figure 10. charge pump waveform
10 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 figure 12. charge pump phase 2 v cc = +5 v v ss storage capacitor v dd storage capacit o r c 1 c 2 c 3 c 4 + + + + ? ? ? ? -5.5v v cc = +5v ?5v ?5v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + + + ? ? ? ? figure 11. charge pump phase 1 figure 13. charge pump phase 3 v cc = +5v ?5v ?5v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + + + ? ? ? ? figure 14. charge pump phase 4 v cc = +5 v v ss storage capacitor v dd storage capacit o r c 1 c 2 c 3 c 4 + + + + ? ? ? ? +5.5v
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 11 figure 15. circuit for the connectivity of the sp3238e with a db-9 connector 6. dce ready 7. request to sen d 8. clear to send 9. ring indicator db-9 connector pins : 1. received line signal detecto r 2. received data 3. tr ansmitted data 4. data te rminal read y 5. signal ground (common) 6 7 8 9 1 2 3 4 5 db-9 connector 26 v cc 0.1f c5 + v cc gnd 2 to p supervisor circui t 8 9 11 5k 5k 5k 16 21 20 18 5 6 7 r 1 out r 1 in r 1 out r 2 in r 3 in r 2 out r 3 out 10 12 24 23 22 t 1 in t 2 ou t t 2 in t 3 in t 3 out t 1 out 19 17 t 4 out t 4 in t 5 in t 5 out sp3238e 28 25 3 1 27 4 c3 c4 + + c1+ c1- c2+ c2 - v+ v- + c2 c1 + 13 14 15 v cc online shutdown st a tus 0.1f 0.1f 0.1 f 0.1 f
12 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 the frst stage, shown in figure 17, detects an inactive input. a logic high is asserted on r x inact if the cable is disconnected or the external transmitters are disabled. otherwise, r x inact will be at a logic low. this circuit is duplicated for each of the other receivers. the second stage of the auto on-line ? circuitry, shown in figure 18, processes all the receiver's r x inact signals with an accumulated delay that disables the device to a 1a supply current. the status pin goes to a logic low when the cable is disconnected, the external transmitters are disabled, or the shutdown pin is invoked. the typical accumulated delay is around 20s. when the sp3238e drivers or inter - nal charge pump are disabled, the supply current is reduced to 1a. this can commonly occur in handheld or portable applications where the sp3238e device has a patent pending auto on-line ? circuitry on board that saves power in applications such as laptop computers, palmtop (pda) computers and other portable systems. the sp3238e device incorporates an auto on-line ? circuit that automatically enables itself when the external transmitters are enabled and the cable is connected. conversely, the auto on-line ? circuit also disables most of the inter - nal circuitry when the device is not being used and goes into a standby mode where the device typically draws 1a. this function is externally controlled by the online pin. when this pin is tied to a logic low, the auto on-line ? func - tion is active. once active, the device is enabled until there is no activity on the receiver inputs. the receiver input typically sees at least + 3v, which are generated from the transmitters at the other end of the cable with a + 5v minimum. when the external transmitters are disabled or the cable is disconnected, the receiver inputs will be pulled down by their internal 5k? resistors to ground. when this occurs over a period of time, the internal transmitters will be disabled and the device goes into a shutdown or standby mode. when online is high, the auto on-line ? mode is disabled. the auto on-line ? circuit has two stages: 1) inactive detection 2) accumulated delay auto online circuitry the rs-232 cable is disconnected or the rs-232 drivers of the connected peripheral are turned off. the auto on-line ? mode can be disabled by the shutdown pin. if this pin is a logic low, the auto on-line ? function will not operate regardless of the logic state of the online pin. table 3 summarizes the logic of the auto on- line ? operating modes. the status pin outputs a logic low signal if the device is shutdown. this pin goes to a logic high when the external transmitters are enabled and the cable is connected. when the sp3238e device is shutdown, the charge pumps are turned off. v+ charge pump output decays to v cc , the v- output decays to gnd. the decay time will depend on the size of capacitors used for the charge pump. once in shutdown, the time required to exit the shut down state and have valid v+ and v- levels is typically 200ms. for easy programming, the status can be used to indicate dtr or a ring indica - tor signal. tying online and shutdown together will bypass the auto on-line ? cir - cuitry so this connection acts like a shutdown input pin
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 13 figure 16. auto on-line ? timing waveforms receiver rs-232 input vo lt ages s ta tus +5v 0v -5v t stsl t stsh t online v cc 0v driver rs-232 output vo lt ages 0v +2.7v -2.7v s h u t d o w n figure 17. stage i of auto on-line ? circuitry rs-232 recei v er block r x inact inactive detection block r x in r x out r 1 inact r 2 inact r 3 inact r 4 inact r 5 inact delay stage delay stage delay stage delay stage delay stage shutdow n st a tus figure 18. stage ii of auto on-line ? circuitry
14 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 n w o d t u h s t u p n i t u p n i t u p n i t u p n i t u p n i e n i l n o t u p n i t u p n i t u p n i t u p n i t u p n i t a l a n g i s 2 3 2 - s r t u p n i r e v i e c e r t u p n i r e v i e c e r t u p n i r e v i e c e r t u p n i r e v i e c e r t u p n i r e v i e c e r s u t a t s t u p t u o t u p t u o t u p t u o t u p t u o t u p t u o t x t u o r x t u o r 1 t u o r e v i e c s n a r t s u t a t s s u t a t s s u t a t s s u t a t s s u t a t s h g i h - s e y h g i h e v i t c a e v i t c a e v i t c a l a m r o n n o i t a r e p o h g i h h g i h o n w o l e v i t c a e v i t c a e v i t c a l a m r o n n o i t a r e p o h g i h w o l 0 0 1 > ( o n ) s w lo high-z active ve i t c a n w o d t u h s ( e n i l n o - o t u a ) w o l - s e y h g i h z - h g i h z - h g i h e v i t c a n w o d t u h s w o l - o n w o l z - h g i h z - h g i h e v i t c a n w o d t u h s table 2. auto on-line ? logic
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 15 esd t olerance the sp3238e device incorporates ruggedized esd cells on all driver output and receiver input pins. the esd structure is improved over our previous family for more rugged applications and environments sensitive to electro-static dis - charges and associated transients. the improved esd tolerance is at least + 15kv without damage nor latch-up. there are different methods of esd testing ap - plied: a) mil-std-883, method 3015.7 b) iec61000-4-2 air-discharge c) iec61000-4-2 direct contact the human body model has been the generally accepted esd testing method for semi-con - ductors. this method is also specified in mil-std-883, method 3015.7 for esd testing. the premise of this esd test is to simulate the human bodys potential to store electro-static energy and discharge it to an integrated circuit. the simulation is performed by using a test model as shown in figure 19. this method will test the ics capability to withstand an esd transient during normal handling such as in manufacturing areas where the ic's tend to be handled frequently. the iec-61000-4-2, formerly iec801-2, is gen - erally used for testing esd on equipment and systems. for system manufacturers, they must guarantee a certain amount of esd protection since the system itself is exposed to the outside environment and human presence. the premise with iec61000-4-2 is that the system is required to withstand an amount of static electricity when esd is applied to points and surfaces of the equipment that are accessible to personnel dur - ing normal usage. the transceiver ic receives most of the esd current when the esd source is applied to the connector pins. the test circuit for iec61000-4-2 is shown on figure 20. there are two methods within iec61000-4-2, the air discharge method and the contact discharge method. with the air discharge method, an esd voltage is applied to the equipment under test (eut) through air. this simulates an electrically charged person ready to connect a cable onto the rear of the system only to fnd an unpleasant zap just before the person touches the back panel. the high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the sys - tem. this energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. variables with an air discharge such as approach speed of the object carrying the esd potential to the system and humidity will tend to change the discharge current. for example, the rise time of the discharge current varies with the approach speed. the contact discharge method applies the esd current directly to the eut. this method was devised to reduce the unpredictability of the esd arc. the discharge current rise time is constant since the energy is directly transferred without the air-gap arc. in situations such as hand held sys - tems, the esd charge can be directly discharged to the equipment from a person already holding the equipment. the current is transferred on to the keypad or the serial port of the equipment directly and then travels through the pcb and fnally to the ic. figure 19. esd test circuit for human body model r c devic e under test dc power sourc e c s r s sw1 sw2
16 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 device pin human b ody iec61000-4-2 tested model air discharge direct contact level driver outputs + 15kv + 15kv + 8kv 4 receiver inputs + 15kv + 15kv + 8kv 4 the circuit models in figures 19 and 20 represent the typical esd testing circuit used for all three methods. the c s is initially charged with the dc power supply when the frst switch (sw1) is on. now that the capacitor is charged, the second switch (sw2) is on while sw1 switches off. the voltage stored in the capacitor is then applied through r s , the current limiting resistor, onto the device under test (dut). in esd tests, the sw2 switch is pulsed so that the device under test receives a duration of voltage. for the human body model, the current limiting resistor (r s ) and the source capacitor (c s ) are 1.5k? an 100pf, respectively. for iec-61000-4-2, the current limiting resistor (r s ) and the source ca - pacitor (c s ) are 330? an 150pf, respectively. the higher c s value and lower r s value in the iec61000-4-2 model are more stringent than the human body model. the larger storage capaci - tor injects a higher voltage to the test point when sw2 is switched on. the lower current limiting resistor increases the current charge onto the test point. figure 21. esd test waveform for iec61000-4-2 figure 20. esd test circuit for iec61000-4-2 table 3. transceiver esd tolerance levels r s and r v add up to 330 for iec61000-4-2. r c devic e under test dc power sourc e c s r s sw1 sw2 r v contact-discharge model t = 0ns t = 30ns 0a 15a 30a i t
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 17 package: 28 pin ssop e
18 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 package: 28 pin tssop
exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 19 ordering information for tape and reel option add "/tr", example: sp3238eca-l/tr. part number temp. range package sp3238eca-l 0c to +70c 28 pin ssop sp3238eca-l/tr 0c to +70c 28 pin ssop sp3238ecy-l 0c to +70c 28 pin tssop sp3238ecy-l/tr 0c to +70c 28 pin tssop sp3238eea-l -40c to +85c 28 pin ssop sp3238eea-l/tr -40c to +85c 28 pin ssop sp3238eey-l -40c to +85c 28 pin tssop sp3238eey-l/tr -40c to +85c 28 pin tssop
20 exar corporation 48720 kato road, fremont ca, 94538 ? 510-668-7017 ? www.exar.com sp3238e_100_020111 revision history notice exar corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reli - ability. exar corporation assumes no representation that the circuits are free of patent infringement. charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's specifc application. while the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. exar corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to signifcantly af fect its safety or effectiveness. products are not authorized for use in such applications unless exar corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized ; (b) the user assumes all such risks; (c) potential liability of exar corporation is adequately protected under the circumstances. copyright 2011 exar corporation datasheet february 2011 for technical support please email exar's serial technical support group at : serialtechsupport@exar.com reproduction, in part or whole, without the prior written consent of exar corporation is prohibited. date revision description 03/04/05 -- legacy sipex datasheet 02/01/11 1.0.0 convert to exar format, update ordering information and change esd specifcation to iec61000-4-2

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